Congratulations to alumnus Bryan Root (ElEngr’84), who was recently elevated to Institute of Electrical and Electronics Engineers Fellow for leadership in improving semiconductor reliability test methods.
Each year, less than 0.1% of IEEE voting members are selected for fellow status, the group’s highest membership level. It recognizes “extraordinary accomplishments in any of the IEEE fields of interest.”
Root is the founder, owner and chairman of Celadon Systems, a Minnesota-based company that manufactures ultra-high performance wafer probe cards for the semiconductor industry. He started the company in 1997.
“Being recognized by my peers as an IEEE Fellow is one of the greatest honors of my life. But my achievements are built on the foundation of the professors, advisors, knowledge and excellence that I learned at CU Boulder,” Root said. “This achievement is also built on the shoulders of the many patient mentors that helped me through the years, two of which I am sad to say are no longer with us – Bob Thomas of RADC and Harry Schafft of NIST.”
Here’s what Root’s nominator, Chris Henderson of Semitracks Inc. in Albuquerque, had to say about his distinguished career:
Mr. Root is a pioneer and key innovator in semiconductor wafer level test. His revolutionary work spans 35 years and is used by more than 300 semiconductor companies and institutions around the world. In reliability and device test, he has been a key researcher, inventor, developer, implementer, evangelist, manufacturer and a driver of industry standards. These contributions touch every device manufactured by the industry. Manufacturers report quicker time to market by eliminating packaging before testing, reducing test time and time to test, and reducing the cost of test. Mr. Root’s work has quickened the pace of the industry by lowering costs and improving device functionality and reliability.
Mr. Root’s contributions began in 1984, when he started his research on methods to assess the reliability of devices and structures at the wafer level. His research focus was to accelerate semiconductor reliability testing from weeks to days or even seconds. This required new test methods and improving existing test methods. The result of his significant body of work has been his invention of SWEAT (the Standard Wafer-level Electromigration Accelerated Test), a breakthrough in semiconductor reliability testing that ushered in the era of Wafer-Level Reliability (WLR) characterization, and for the first time, thin film metallization reliability testing could be incorporated as a monitor in the manufacturing process flow; his refinement and popularization of the Isothermal test (a fast wafer level electromigration test); and the invention and development of equipment and probe cards for parallel large sample size wafer level reliability tests.
Additionally, through Mr. Root’s founding and leadership of the JEDEC 14.2 standards committee on wafer level reliability. he drove the standardization and popular use of tests for electromigration (contributing his own work on SWEAT and the Isothermal test), TDDB (Time Dependent Dielectric Breakdown) and HCI (Hot Carrier Injection). With the foundation of these standards in the public domain, and the adoption by other standards organizations like JEITA, researchers continue to refine and publish new work. To add to this impressive list of accomplishments. Mr. Root’s pioneering work beginning in 1987 resulted in the first commercially successful equipment for electromigration, TDDB and HCI test. This equipment continues to be widely used in the semiconductor industry.
In 1997, Mr. Root shifted his focus to solving the theretofore insurmountable industry problem of precisely and reliably probing and measuring electrical parameters on wafers under extreme conditions. Mr. Root’s inventions and 66 patents are now widely used in the industry and have resulted in:
- the only full wafer (200mm and 300mm) crash resistant multi-site massively parallel test probe cards for reliability and burn-in, capable of sustained use up to 400°C, some of which have endured continuous use at temperatures above 250°C for several years
- invented the first crash resistant, low current leakage (fA), low EMI noise, device and reliability test probe card capable of long term sustained use at -65°C to 400°C;
- invented the first device test probe card for sustained use at 600°C
- invented the first fast-settling ultra-low current leakage (sub 1 fA/V at 23°C and sub 10fA/V at 300°C) probe card for long-term sustained use at temperatures of -65°C to 300°C
- invented the first small format low-leakage, crash resistant, 4K to 300°C probe card for single site or multi-site use in device test or reliability test
- invented the first low leakage low noise quick-swap parametric probe core
- invented the first parametric probe card indexer for swapping cores in seconds enabling “lights out” in situ diagnostics
- invented the first non-magnetic close-coupling, swappable, probe core for ultra-high magnetic field (up to 0.8T) testing
- invented the first high voltage(3000V) 23°C to 200°C swappable core utilizing a temperature controllable air jet for pressure and turbulence to suppress surface arcing
- invented an ultra-stable functional test probe card for sustained use at high temperatures.
Today, tens of thousands of Mr. Root’s ultra-reliable mission critical probing solutions are in use by many semiconductor companies, universities and institutions in research labs, reliability labs, parametric test floors and functional test floors.
Mr. Root’s seminal work in Wafer-Level Reliability was initiated at Mostek as a device reliability engineer, continued at Sperry as a senior device engineer, accelerated with the founding of Sienna Technologies, and continues today after he founded Celadon Systems in 1997. Mr. Root continues to mentor and fund young engineers and interns in high voltage device and reliability test and RF reliability research.
