The funding is part of a larger $32.7 million award to 14 colleges meant to improve the performance of emerging commercial and defense systems
The University of Colorado Boulder is receiving $1.5 million as part of a larger, multi-year, multi-college award from the Semiconductor Research Corp. (SRC) and the Defense Advanced Research Projects Agency (DARPA) with the goal of improving the performance, efficiency and capabilities of electronic systems for emerging commercial and defense applications.
To advance that agenda, SRC and DARPA have created a $32.7 million Center for Heterogeneous Integration of Micro Electronic Systems (CHIMES) program, which is being led by Penn State.
“The global semiconductor industry is projected to become a trillion-dollar industry by 2030—driven primarily by computing, data storage, wireless and automotive applications—which is incredible considering that it took 55 years to reach half a trillion dollars in size and will take less than 10 years to double,” said Madhavan Swaminathan, head of electrical engineering and William E. Leonhard Endowed Chair in Penn State College of Engineering’s School of Electrical Engineering and Computer Science, who will direct the center.
“Such phenomenal growth requires new and transformative logic, memory and interconnect technologies to overcome the inevitable slowdown of traditional dimensional scaling of semiconductors.”
This is the focus of CHIMES, according to Swaminathan. Fourteen university partners—including the University of Colorado Boulder—will collaborate to advance heterogenous integration, the efficient and effective integration and packaging of semiconductor devices, chips and other components.
CU Chemistry Professor Steven George, who will direct CHIMES research in Boulder, said he was excited to learn about the new funding.
“This funding is over a five-year period. This longer period will allow us to do the ‘heavy lifting’ required to tackle some hard problems and develop new areas,” he said. “The five-year period is also better for the graduate students, because this duration overlaps with the timeline for their PhD research.”
CHIMES participants will explore 23 research tasks under four synergistic themes, which include system-driven functional integration and aggregation; monolithic 3D densification and diversification on silicon platform; ultra-dense heterogeneous interconnect and assembly; and materials behavior, synthesis, metrology and reliability.
At CU Boulder, much of the research will focus on methods to deposit thin films.
“This new funding from SRC/DARPA Center at Penn State will allow us to continue to develop our work using electrons to enhance thin film processing,” George said. “Our earlier work has demonstrated that electrons can enhance atomic layer deposition (ALD) and facilitate ALD at much lower temperatures than is typical for thermal ALD.
“We have been able to show earlier that electron-enhanced ALD (EE-ALD) can lower the deposition temperature for materials, such as GaN and Si, from 800 to 1,000 Celsius to less than 100 C. This temperature reduction is critical for semiconductor device fabrication, because high processing temperatures can lead to device failure.”
Additionally, EE-ALD is topographically selective and can facilitate area selective deposition (ASD). George said that is notable because ASD is critical for the fabrication of advanced semiconductor devices that have dimensions less than the limits of photolithography.
This area of research at CU Boulder ties in well with the research being conducted by Penn State and the other universities, according to George, who noted that CHIMES is focusing on the heterogeneous integration needed for 3D devices.
“Current devices are largely confined to the 2D plane of the silicon wafer. Future devices will move into the third dimension to continue to provide improved performance, more devices per area and lower cost,” he said. “The previous device developments measured by ‘Moore’s Law’ will continue as device architecture moves into the third dimension.”
Moving into the third dimension means that devices will have many levels, similar to many floors in a building, George explained.
“How these floors are connected by elevators between the floors and hallways within a floor is a challenge,” he said. “There will also be active devices located on various floors. Having logic and memory close to each other on the same floor or between adjacent floors will speed up device performance.
“My research in CHIMES will focus on the deposition of the interconnecting lines between the floors or in the hallways between the rooms on the floor,” he added. “We will also work on the deposition of some novel materials that are needed to fabricate transistors on the various floors or elevator shafts of the 3D device. My focus is on processing. Others in CHIMES are focused on 3D design and stacking multiple chips on each other to obtain even higher scaling.”
George said the latest funding through CHIMES will allow him to continue research he has been working on for more than a decade.
This new funding from SRC/DARPA Center at Penn State will allow us to continue to develop our work using electrons to enhance thin film processing.”
“Our research on EE-ALD was initiated by DARPA about 10 years ago. At that time, EE-ALD was a ‘pie-in-the-sky’ concept,” he said. With DARPA funding, George said it was possible to build equipment to enhance thin film processing and to demonstrate the technology for semiconductor device fabrication. “Now, as part of CHIMES at Penn State, we are targeting more challenges for this technology. Our research for CHIMES represents the continued development of EE-ALD for new materials and selective deposition of then film growth.”
Penn State’s Swaminathan said a highly multidisciplinary center such as CHIMES “will have a major impact on the future of microelectronic systems, especially as research tasks, themes and, more importantly, team members synergize with international roadmaps.
“Any research output from CHIMES needs to be translational, and capable of moving from the lab to manufacturing,” he added. “Therefore, coordination with national efforts, such as the CHIPS Act and the Microelectronics Manufacturing USA Initiative, is critical.”
According to Roman Caudillo, Intel-SRC assignee and director of the JUMP 2.0 program, such coordination and collaboration is key to graduating what researchers will learn during the center’s first years into the future for the commercial industry.
“The DARPA innovation programs, like JUMP 2.0, drive public-private investment for disruptive innovation in microelectronics systems at scale, with the goal of mitigating technology risks and delivering critical future commercial insight and intellectual property,” Caudillo said.
“The CHIMES proposal and view of the future resonated with the investors on how the future needs to evolve. We’re really excited about this partnership and to see the impact CHIMES will have in the next five years and beyond.”