Professional Publications

Additional publications can be found on Google Scholar

2024 DesignCon  Bootcamp: Free and low-cost SI Tools

download the bootcamp presentation slides here
download the QUCS files for S-parameters
download the QUCS files for resistance impedance analysis here
download the QUCS files for capacitor impedance analysis here
download the Ansys student project files here
download the slides from my talk on measuring low Z with the ZNL VNA
download the slides from my talk on measuring the bandwidth of scopes

 

2022

Five Low Cost SI technologgy Solutions, presented at DesignCon 2022-slides

2021

Non-destructive PCB Substrate Height Extraction with Multi-Measurement Technique
Analyzing and Reducing Signal to Cavity Coupling in PCBs and Packages for Digital and Mixed Signal Applications

2020

Bogatin’s Practical Guide to Transmission Line Design and Characterization for Signal Integrity Applications

2019

Power Distribution Network (PDN) Impedance and Target Impedance
Experiments and demonstrations at EMC+SIPI 2019

2018

Transfer Impedance Drop off in Power/Ground Plane Cavities
VRM Modeling: A Strategy to Survive the Collision of Three Worlds
Principles of Power Integrity for PDN Design:
Power Distribution Network (PDN) Impedance and Target Impedance

2017

Development of a PCB kit for s-parameter de-embedding algorithms verification
Synthesis of high-speed channels from shorter elements
Principles of power integrity for PDN design--simplified: robust and cost-effective design for high-speed digital products

2016
A new method to verify the accuracy of de-embedding algorithms
Assessing techniques to compare signal integrity data for high-speed interconnects

2014

Have Your Cake and Eat It, Too: Engineering Measurements at Fabrication for Channel Design and Process Control

2013

Which One is Better? Comparing Options to Describe Frequency Dependent Losses
Dramatic Noise Reduction using Guard Traces with Optimized Shorting Vias
Dynamic speakers in Denver!
Methods of optimized via design for higher channel bandwidth

2012

Robust Method for Addressing 12 Gbps Interoperability for High-Loss and Crosstalk-Aggressed Channels

2011

Method of Modeling Differential Vias
Essential Principles of Signal Integrity
Differential Via Modeling Methodology
 

2010

Impact of Copper Surface Texture on Loss: A Model that Works
Analysis of return path discontinuities in multilayer PCBs and their impact on the signal and power integrity
Method of Modeling Differential Vias Issue: 2.1
Signal and power integrity--simplified

 

2009

Power Distribution Planes: To Split or Not to Split?
Practical Analysis of Backplane Vias
Signal Integrity Research of High-Speed Circuit of Embedded System
Signal and Power Integrity-Simplified: Signal Integ Simpl Secon E_2
Probe array wafer
Signal integrity characterization techniques

 

2008

Signal integrity parameters for health monitoring of digital electronics

 

2007

What Really is Characteristic Impedance?

 

2006

Electro ceramic components

 

2004

The socket response to current packaging and test trends
The Critical Length of a Transmission Line
Method for manufacturing electro ceramic components
What you lose from a lossy line-At clock frequencies greater than 1 GHz and interconnects longer than 12 in., transmission-line-loss effects dominate signal integrity. A …
Signal integrity: simplified
Analysis of board layout helps cure jitter problems

 

2003

Ceramic technology top 10
Origami-style structure simplifies packaging efficiency
Gold stud bumping-the other flip-chip process
High-tech packaging comes to power supplies

 

2002

Electrical interface to integrated circuit device having high density I/O count
Differential Impedance Measurement with Time Domain Reflectometry
Lead-Free Is Coming.
All Dressed Up and Nowhere to Go.
Bluetooth: Poster Child for the SiP.
Assembly & packaging
Diamonds in the Rough.
Is Your Package Causing EMC Failures?
No Myths Allowed
Packaging's Crystal Ball: The 2001 ITRS Roadmap

 

2001

Embedded Distributed Capacitance--an Enabling Technology.
The Zen of Packaging.
Fueling the Next-Generation Packaging Revolution.
Process Manufactures High-Volume, Low-Cost HDI Substrates.
Practical Characterization and Analysis of Lossy Transmission Lines
A Rose by Any Other Name...
Practical characterization and analysis of lossy transmission lines
Packaging Challenges for Micro-Optoelectromechanical Systems.
The New Packaging Driver: Network Application Chips.
High-Temperature Superconductors--Then and Now.

 

2000

Method of producing an electrical interface to an integrated circuit device having high density I/O count

 

1999

What Really Is Inductance?

 

1998

Method for direct attachment of an on-chip bypass capacitor in an integrated circuit
Field solvers and PCB stack-up analysis: comparing measurements and modelling

 

1997

Creating design rules for interconnect substrates with a field solver
Method for direct attachment of an on-chip bypass capacitor in an integrated circuit
Creating design rules for interconnect substrates with a field solver
Roadmaps of packaging technology

 

1996

Thin film chip capacitor for electrical noise reduction in integrated circuits

 

1990

A closed form analytical model for the electrical properties of microstrip interconnects

 

1989

Compliant overlay for use as an optically-based touch-sensitive screen

 

1988

Design rules for microstrip capacitance
Field Solvers and PCB Stack-up Analysis: Comparing Measurements and Modeling

 

1987

A High-Performance Packaging Technology To Match Optical Transmission

 

1980

THREE NEW HIGH PRECISION TESTS OF RELATIVITY AND MACH’S PRINCIPLE